1. Field of the Invention
The present invention relates to a mesh capacitor structure and, more particularly, to a mesh capacitor structure, applied in an integrated circuit, with an enhanced capacitance through the use of coupling capacitances.
2. Description of the Related Art
FIG. 1 is a perspective view showing a conventional parallel plate capacitor structure 1 applied in an integrated circuit. Referring to FIG. 1, the conventional parallel capacitor structure 1 includes a lower metal plate 10 and an upper metal plate 11 arranged in parallel to each other with a distance therebetween. The lower metal plate 10 and the upper metal plate 11 are served as two opposite electrodes of the conventional parallel capacitor structure 1, respectively. The lower metal plate 10 is formed over a semiconductor substrate 13 through an insulating layer 12. The upper metal plate 11 is formed over the lower metal plate 10 through a dielectric layer (not shown).
The conventional parallel plate capacitor structure 1 mainly employs parallel electric fields generated between the lower and upper metal plates 10 and 11 to achieve a desirable capacitance, i.e., the so-called xe2x80x9cparallel plate capacitance.xe2x80x9d Consequently, the capacitance of the conventional parallel plate structure 1 is proportional to the surface area of the lower and upper metal plates 10 and 11. As the processing technology in the field of integrated circuits continuously improves, semiconductor circuit devices can be manufactured much smaller, thereby raising the integration of integrated circuits. However, it is necessary for the conventional parallel capacitor structure 1 to occupy a relatively large area in order to provide a sufficient capacitance. As a result, the aim of higher integration of integrated circuits is undesirably obstructed.
In view of the above-mentioned problem, an object of the present invention is to provide a mesh capacitor structure, applied in an integrated circuit, with an enhanced capacitance through the use of coupling capacitances.
Another object of the present invention is to provide a mesh capacitor structure, applied in an integrated circuit, which may be formed in various shapes and sizes depending on a requirement of circuit design by arranging a suitable number of unit capacitor modules.
According to one aspect of the present invention, a mesh capacitor structure in an integrated circuit are constituted by coupling at least one unit capacitor module on a semiconductor substrate. Each of the at least one unit capacitor module includes a plurality of first conductive strips, a plurality of second conductive strips, and a plurality of conductive plugs.
The plurality of first conductive strips are formed on the semiconductor substrate, extending in parallel to each other in a lateral direction. The plurality of second conductive strips are formed over the plurality of first conductive strips through a dielectric layer, extending in parallel to each other in a longitudinal direction.
The plurality of conductive plugs pass through the dielectric layer and are formed at intersections between odd-numbered second conductive strips and odd-numbered first conductive strips as well as between even-numbered second conductive strips and even-numbered first conductive strips such that the odd-numbered second conductive strips are connected to the odd-numbered first conductive strips, thereby serving as a first electrode, and the even-numbered second conductive strips are connected to the even-numbered first conductive strips, thereby serving as a second electrode with an electrical polarity opposite to the first electrode.
According to another aspect of the invention, the plurality of conductive plugs pass through the dielectric layer and are formed at intersections between odd-numbered second conductive strips and even-numbered first conductive strips as well as between even-numbered second conductive strips and odd-numbered first conductive strips such that the odd-numbered second conductive strips are connected to the even-numbered first conductive strips, thereby serving as a first electrode, and the even-numbered second conductive strips are connected to the odd-numbered first conductive strips, thereby serving as a second electrode with an electrical polarity opposite to the first electrode.
The meshed structure of both the first and second electrodes of the mesh capacitor structure according to the present invention gives rise to an advantage of reducing the undesirable parasitic inductance. Furthermore, the mesh capacitor structure according to the present invention can easily be coupled, both in the lateral and longitudinal directions, to other circuit elements in an integrated circuit because each of the first and second electrodes has conductive strips extending in the lateral and longitudinal directions. Consequently, the flexibility of the circuit design is significantly improved.